Central Library , Vidyasagar University

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Central Library - Vidyasagar University

“Education does not only mean learning, reading, writing, and arithmetic,

it should provide a comprehensive knowledge”

-Ishwarchandra Vidyasagar


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Introductory VHDL : from simulation to synthesis / by Sudhakar Yalamanchili.

By: Yalamanchili, Sudhakar.
Material type: TextTextPublisher: Delhi : Pearson education , 2003Edition: .Description: xix,401p. : illus.,figs.,tables ; 24cm CD.ISBN: 8178085585.Subject(s): VHDL(COMPUTER HARDWARE DESCRIPTION LANGUAGEDDC classification: 621.392
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Item type Current location Call number Copy number Status Date due Barcode
Books Books Central Library
Old Stack Room 		621.392 YAL/I (Browse shelf) 1 Available 64870

Includes Bibliographical references & index

64870 Rs. 299.00

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