| 000 | 00733cam a2200241ua 4500 | ||
|---|---|---|---|
| 001 | 20464 | ||
| 005 | 20171214164014.0 | ||
| 007 | ta | ||
| 008 | 051205s2003 a g b000 u eng u | ||
| 020 |
_a8178085585 _cRs. 299.00 |
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| 040 | _aMAIN | ||
| 041 | 1 |
_aeng _hNULL |
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| 082 | 1 | 4 |
_a621.392 _bYAL/I |
| 100 | 1 | _aYalamanchili, Sudhakar. | |
| 245 | 1 | 0 |
_aIntroductory VHDL : from simulation to synthesis / _cby Sudhakar Yalamanchili. |
| 250 |
_a / _b. |
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| 260 |
_aDelhi : _bPearson education , _c2003. |
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| 300 |
_axix,401p. : _billus.,figs.,tables ; _c24cm _eCD . |
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| 365 | _aRs. 299.00 | ||
| 504 | _aIncludes Bibliographical references & index | ||
| 653 | 0 | _aVHDL(COMPUTER HARDWARE DESCRIPTION LANGUAGE | |
| 942 | _cBK | ||
| 999 |
_c20144 _d20144 |
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