Uyemura ,John P. <br/><br/>
Chip design fo submicron VLSI:  cmos layout and simulation / 
by John P. Uyemura  
 - New Delhi:  Cengage Learning,  2006. 
 - xvi,411p.:  ill.,tables;  24cm. 
<br/><br/>Includes index and appendix. 
<br/><br/><label>ISBN: </label>9788131501955:  Rs.575.00 
<br/><br/><label>Subjects--Topical Terms: </label><br/>METALOXIDICE CONDUCTOR
<br/><br/><label>Dewey Class. No.: </label>621.395   / UYE/C